Instruction Decoder
Build an instruction decoder that converts opcodes into control signals—the CPU component that interprets what each instruction means.
Overview
The instruction decoder takes the opcode (operation code) from an instruction and generates control signals that tell each CPU component what to do. For example, an ADD instruction activates the ALU, selects the right registers, and routes data appropriately. This is implemented with decoders and combinational logic.
Components Needed
- 2x SN74HC138 IC (3-to-8 Decoder)
- severalx Various logic gate ICs
- 10x LED
- 1x DIP switch (8-position)
- severalx Wires
Instructions
Define Your Instruction Set
Design a simple instruction set with 8 operations (3-bit opcode): LOAD, STORE, ADD, SUB, AND, OR, JUMP, HALT. List what control signals each needs.
Create Control Signal Table
Make a truth table: rows are opcodes, columns are control signals (RegWrite, MemRead, ALUop, etc.). Mark which signals are active for each instruction.
Build the Decoder
Use a 74HC138 to decode the 3-bit opcode into 8 lines. Each line represents one instruction. Combine outputs with OR gates to generate each control signal.
Test Each Instruction
Set each opcode on DIP switches. Verify the correct control signals activate (shown on LEDs). Test all 8 instructions.
Challenges
- Expand to 16 instructions with a 4-bit opcode
- Add conditional control based on ALU flags
- Implement multi-cycle instructions with a state machine
- Build a microcode ROM instead of discrete logic