CPU Architecture Fundamentals

How processors work: the fetch-decode-execute cycle, datapath, control, RISC vs CISC, and Von Neumann vs Harvard architectures.

A CPU (Central Processing Unit) is the brain of a digital system, executing a stream of instructions stored in memory. At its core, the CPU repeatedly fetches an instruction, decodes what it means, and executes the operation. Understanding CPU architecture connects every digital topic—combinational logic (ALU), sequential logic (registers, counters), state machines (control unit), and memory—into one integrated system.

Objectives

  • Describe the fetch-decode-execute cycle in detail
  • Identify the major CPU components: PC, IR, ALU, register file, control unit
  • Trace data flow through the CPU datapath
  • Compare Von Neumann and Harvard architectures
  • Distinguish RISC and CISC design philosophies

Key Takeaways

  • CPU = fetch-decode-execute cycle running continuously
  • Datapath: PC, IR, register file, ALU, buses, and multiplexers
  • Von Neumann: shared memory; Harvard: separate instruction/data memory
  • RISC: simple instructions, many registers; CISC: complex instructions
  • All components are built from logic gates, flip-flops, and multiplexers

Applications

  • Microcontrollers: Arduino, PIC, STM32 are all CPUs with peripherals on one chip.
  • Desktop Processors: x86 CPUs (Intel/AMD) execute billions of instructions per second.
  • Embedded Systems: ARM CPUs power smartphones, IoT devices, and automotive systems.
  • Custom Processors: FPGA-based soft CPUs for application-specific computing.

Practice Problems

Problem 1: List the five stages of instruction processing in order.

Problem 2: An 8-bit CPU has a 16-bit address bus. How much memory can it address?

Problem 3: Why does the Harvard architecture avoid the Von Neumann bottleneck?

Problem 4: A RISC CPU has 32 registers. How many bits are needed to address one register?