Digital Signals

In theory, digital signals snap instantly between 0 and 1. In reality, signals have finite rise and fall times, noise margins determine reliability, and voltage thresholds vary between logic families. Understanding these real-world characteristics is essential for building circuits that work reliably outside the classroom.

Objectives

• Distinguish analog and digital signals and their representations
• Define and measure rise time, fall time, and propagation delay
• Calculate noise margins from V_OH, V_OL, V_IH, V_IL specifications
• Read and interpret timing diagrams
• Understand clock signals: frequency, period, and duty cycle
• Recognize common signal integrity issues

Key Takeaways

• Real digital signals have finite rise/fall times, not instantaneous transitions
• Noise margins (NM_H = V_OH - V_IH, NM_L = V_IL - V_OL) determine reliability
• The forbidden zone between V_IL and V_IH should be traversed quickly
• Clock signals have frequency, period, and duty cycle as key parameters
• Signal integrity issues (ringing, overshoot, crosstalk) matter at higher speeds
• Different logic families have different voltage thresholds - check datasheets

Applications

• Circuit Debugging: Understanding real signal behavior helps diagnose timing and noise issues.
• PCB Design: Signal integrity knowledge is essential for high-speed board layout.
• Logic Family Selection: Noise margins and speed determine which family fits your application.
• Oscilloscope Interpretation: Knowing what to look for when probing digital signals.

Practice Problems

Problem 1: A 3.3V CMOS gate has V_OH = 3.0V, V_OL = 0.2V, V_IH = 2.0V, V_IL = 0.8V. Calculate both noise margins.

Problem 2: A clock signal has a period of 20 ns. What is its frequency?

Problem 3: A signal has a rise time of 5 ns. Estimate its bandwidth.

Problem 4: A clock runs at 100 MHz with a 60% duty cycle. How long is the HIGH portion?

Problem 5: Can a 5V TTL output reliably drive a 3.3V CMOS input? Why or why not?