Multiplexers (MUX)

A multiplexer (MUX) is a combinational circuit that selects one of several input signals and forwards it to a single output. Think of it as a digitally-controlled switch. Select lines determine which input reaches the output. MUXes are fundamental building blocks used in data routing, function generation, and bus systems.

Objectives

• Understand the function and truth table of 2:1, 4:1, and 8:1 multiplexers
• Design MUX circuits from AND-OR gates
• Cascade smaller MUXes to build larger ones
• Use a MUX as a function generator to implement any truth table
• Identify common MUX ICs (74HC151, 74HC153, 74HC157)

Key Takeaways

• A MUX selects one of 2ⁿ inputs using n select lines
• 2:1 MUX: Y = S̄·D0 + S·D1 (one AND-OR level)
• Larger MUXes cascade smaller ones using the MSB for final selection
• A 2ⁿ:1 MUX can implement any n-variable Boolean function (connect data inputs to 0/1)
• Common ICs: 74HC151 (8:1), 74HC153 (dual 4:1), 74HC157 (quad 2:1)
• MUX-based function generators are the basis of FPGA Look-Up Tables (LUTs)

Applications

• Data Routing: Selecting between multiple data sources in communication systems.
• FPGA LUTs: Look-Up Tables in FPGAs are essentially MUXes implementing Boolean functions.
• Bus Systems: Selecting which device drives a shared data bus.
• Display Multiplexing: Driving multiple 7-segment displays with fewer pins.

Practice Problems

Problem 1: Write the Boolean expression for a 2:1 MUX output.

Problem 2: How many select lines does a 16:1 MUX need?

Problem 3: Implement f(A,B) = A⊕B using a 4:1 MUX with A,B as select inputs.

Problem 4: Build a 16:1 MUX from 74HC153 (dual 4:1 MUX) ICs. How many ICs do you need?

Problem 5: A 74HC151 (8:1 MUX) has an active-LOW enable input. What happens when enable is HIGH?