Programmable Logic Overview

Before FPGAs, engineers had limited options for custom digital logic: design an expensive ASIC or wire together standard ICs on a breadboard. Programmable logic devices (PLDs) bridged this gap, allowing users to configure logic in the field. From simple PALs to complex FPGAs, each generation offered more flexibility and capacity.

Objectives

• Trace the evolution from PAL → PLA → GAL → CPLD → FPGA
• Explain the AND-OR array structure of PLDs
• Compare CPLDs and FPGAs in terms of architecture and use cases
• Understand when to use programmable logic vs discrete ICs vs ASICs
• Identify key manufacturers and product families

Key Takeaways

• PAL → PLA → GAL: early programmable AND-OR arrays for simple logic
• CPLD: multiple PLD blocks + routing, non-volatile, predictable timing
• FPGA: millions of configurable logic blocks, most flexible
• ASIC: highest performance per watt, only economical at high volume
• Choose based on: complexity, volume, time-to-market, power, cost

Applications

• Glue Logic: CPLDs replace handfuls of 74HC ICs for board-level logic.
• ASIC Prototyping: FPGAs prototype chip designs before expensive fabrication.
• Low-Volume Production: FPGAs cost-effective when production volume is under 10K-100K units.
• Legacy System Replacement: CPLDs and FPGAs replace discontinued custom ICs.

Practice Problems

Problem 1: A design needs 500 equivalent gates with instant-on capability. CPLD or FPGA?

Problem 2: Why is PLA more flexible than PAL?

Problem 3: An FPGA design must be in production at 1 million units. Should you keep the FPGA or move to ASIC?

Problem 4: What does "non-volatile" mean for a CPLD vs FPGA?