Subtractors and Comparators

Subtraction in digital circuits typically reuses the adder by complementing one operand (two's complement). Magnitude comparators determine whether one binary number is greater than, less than, or equal to another. Both are essential for ALU operations and conditional logic.

Objectives

• Design half and full subtractors from truth tables
• Implement subtraction using an adder with two's complement
• Build a 1-bit magnitude comparator
• Cascade comparators for multi-bit comparison
• Use the 74HC85 4-bit magnitude comparator

Key Takeaways

• Subtraction typically reuses the adder: A - B = A + NOT(B) + 1
• XOR gates + carry-in control switch between add and subtract modes
• Magnitude comparators output A>B, A=B, A<B
• 74HC85 provides 4-bit comparison with cascading for wider numbers
• Multi-bit comparison proceeds from MSB to LSB (most significant bit decides first)

Applications

• ALU Operations: Subtraction and comparison are fundamental ALU functions.
• Sorting Networks: Compare-and-swap operations in hardware sorters.
• Address Range Detection: Checking if an address falls within a valid range.

Practice Problems

Problem 1: Calculate 0110 - 0011 using an adder with two's complement.

Problem 2: Design the Borrow output of a half subtractor using gates.

Problem 3: How many 74HC85 (4-bit comparator) chips for 16-bit comparison?

Problem 4: What are the three outputs of a 1-bit comparator when A=0, B=1?